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74F139 Dual 1-of-4 Decoder/Demultiplexer
April 1988 Revised September 2000
74F139 Dual 1-of-4 Decoder/Demultiplexer
General Description
The F139 is a high-speed, dual 1-of-4 decoder/demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually exclusive active LOW outputs. Each decoder has an active LOW Enable input which can be used as a data input for a 4-output demultiplexer. Each half of the F139 can be used as a function generator providing all four minterms of two variables.
Features
s Multifunction capability s Two completely independent 1-of-4 decoders s Active LOW mutually exclusive outputs
Ordering Code:
Order Number 74F139SC 74F139SJ 74F139PC Package Number M16A M16D N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbols
Connection Diagram
Truth Table
Inputs IEEE/IEC E H L L L L A0 X L H L H A1 X L L H H O0 H L H H H O1 H H L H H O2 H H H L H O3 H H H H L Outputs
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial
(c) 2000 Fairchild Semiconductor Corporation
DS009479
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74F139
Unit Loading/Fan Out
U.L. Pin Names A0 , A1 E O0-O3 Description Address Inputs Enable Inputs (Active LOW) Outputs (Active LOW) 1.0/1.0 1.0/1.0 50/33.3 Input IIH/IIL HIGH/LOW Output IOH/IOL 20 A/-0.6 mA 20 A/-0.6 mA
-1 mA/20 mA
Functional Description
The F139 is a high-speed dual 1-of-4 decoder/demultiplexer. The device has two independent decoders, each of which accepts two binary weighted inputs (A0-A1) and provides four mutually exclusive active LOW Outputs (O0-O3). Each decoder has an active LOW enable (E). When E is HIGH all outputs are forced HIGH. The enable can be used as the data input for a 4-output demultiplexer application. Each half of the F139 generates all four minterms of two variables. These four minterms are useful in some applications, replacing multiple gate functions as shown in Figure 1, and thereby reducing the number of packages required in a logic network.
FIGURE 1. Gate Functions (each half)
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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74F139
Absolute Maximum Ratings(Note 1)
Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3 STATE Output Current Applied to Output in LOW State (Max) ESD Last Passing Voltage (Min) twice the rated IOL (mA) 4000V
-65C to +150C -55C to +125C -55C to +150C -0.5V to +7.0V -0.5V to +7.0V -30 mA to +5.0 mA
Recommended Operating Conditions
Free Air Ambient Temperature Supply Voltage 0C to +70C
+4.5V to +5.5V
-0.5V to VCC -0.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol VIH VIL VCD VOH VOL IIH IBVI ICEX VID IOD IIL IOS ICC Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current Output Short-Circuit Current Power Supply Current -60 13 4.75 3.75 -0.6 -150 20 10% VCC 5% VCC 10% VCC 2.5 2.7 0.5 5.0 7.0 50 Min 2.0 0.8 -1.2 Typ Max Units V V V V V A A A V A mA mA mA Min Min Min Max Max Max 0.0 0.0 Max Max Max VCC Conditions Recognized as a HIGH Signal Recognized as a LOW Signal IIN = -18 mA IOH = -1 mA IOH = -1 mA IOL = 20 mA VIN = 2.7V VIN = 7.0V VOUT = VCC IID = 1.9 A All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded VIN = 0.5V VOUT = 0V
AC Electrical Characteristics
TA = +25C Symbol Parameter Min tPLH tPHL tPLH tPHL Propagation Delay A0 or A1 to On Propagation Delay E1 to On 3.5 4.0 3.5 3.0 VCC = +5.0V CL = 50 pF Typ 5.3 6.1 5.4 4.7 Max 7.5 8.0 7.0 6.5 TA = 0C to +70C VCC = +5.0V CL = 50 pF Min 3.0 4.0 3.5 3.0 Max 8.5 9.0 8.0 7.5 ns ns Units
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74F139
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A
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74F139
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D
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74F139 Dual 1-of-4 Decoder/Demultiplexer
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 6 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com

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